Nonplanar, multi-gate, multi-fin transistors may have increased parasitic gate-to-source and gate-to-drain fringe capacitance as compared to planar transistors. Gate-to-source capacitance and gate-to-drain capacitance may be due to inversion channel capacitance and parasitic gate-to-source capacitance. Additionally, another source of fringe capacitance may arise from the overlap between the gate electrode and the source and/or drain contacts. This fringe capacitance may be significant in the “dead space” area located between the fins of the transistor. This increased capacitance may affect performance (e.g., switching speed) of the transistor.